All published memory-market news.

Nvidia reported fiscal second-quarter 2027 revenue of $96.2 billion, according to Tom's Hardware, while committing up to $160 billion to future memory purchases. The report places total commitments at $279 billion ahead of expected demand growth. Such long-term procurement can tighten access to HBM and related memory capacity by reserving supply well before systems ship.

Executives from the three largest DRAM suppliers used Semicon Taiwan 2026 to describe a transition beyond conventional 2.5D HBM packaging. DigiTimes reports that Samsung, SK hynix and Micron see 3D vertical stacking as a route to shorter data paths and lower transmission power. Moving to wafer-level bonding could improve AI-memory efficiency, while raising manufacturing complexity and capital requirements.

Researchers have proposed FLINT, an architecture that uses high-bandwidth flash to increase the model capacity available to single accelerators and small inference nodes. The approach targets workloads where limited on-package memory, rather than compute throughput, is the primary bottleneck. If practical, such a tier could complement HBM with denser and less costly storage while accepting lower performance for selected data.

SK hynix is reportedly considering Intel Foundry as a second manufacturing source for HBM4E base dies. Future HBM designs can place customer-specific controllers and interface logic in the base die beneath stacked DRAM, increasing the need for advanced foundry processes. A dual-source arrangement could reduce supplier concentration, but no contract or process node has been confirmed.

ADATA's Urban Tapsafe is a portable SSD designed around access-control and convenience features rather than maximum throughput. Tom's Hardware describes NFC-based phone unlocking, selective sharing through an app, interchangeable magnetic face plates and a five-year warranty. The product shows external-drive vendors differentiating with security and industrial design while high-end flash supply remains expensive.

Kioxia and Sandisk have outlined more than $31 billion in joint capital spending for advanced 3D NAND production in Japan through 2032. The program includes Kitakami Fab3, which is targeted for fiscal 2029, and remains dependent in part on Japanese government support. The scale of the plan signals confidence in long-term flash demand, although capacity will arrive over several years rather than immediately.

MSI has introduced a Katana 15 HX C14 option built around DDR4 memory while retaining high-end Intel and Nvidia components. Tom's Hardware reports that a 32GB DDR4 SO-DIMM kit costs about half as much as a comparable DDR5 kit in the current market. The configuration illustrates how elevated DRAM prices can push system vendors toward mature memory standards to preserve retail affordability.

SK hynix is evaluating closer cooperation with Kioxia in NAND Flash, according to DigiTimes. A deeper relationship could combine investment, development or supply-chain strengths at a time when flash producers face high capital requirements. Any market effect depends on the scope of an eventual agreement, which has not been specified in the supplied report.

Micron is reportedly exploring high-endurance NAND modules positioned near GPUs for AI workloads that need more capacity than expensive HBM can provide. The proposed tier would not match DRAM latency or bandwidth, but closer placement could reduce the protocol and distance penalties of accessing conventional storage. If adopted, the architecture could create a new premium NAND use case for large-model inference and training systems.

CXMT has reportedly begun risk production of HBM3E and is providing samples to Alibaba's T-Head and Cambricon. If customer qualification succeeds, the company could move toward larger-scale output in 2027. The development would represent an important step for China's domestic AI-memory supply, though risk production and sampling do not yet demonstrate commercial yields or meaningful volume.

Samsung outlined a long-range HBM architecture plan at Hot Chips 2026. The concept begins with more capable logic in the HBM base die, advances toward additional in-memory functions and ultimately envisions DRAM stacked directly on processor logic. These designs could reduce data movement and improve AI-system efficiency, but they also increase packaging, thermal and manufacturing complexity before commercial deployment.

Solidigm's D7-PS1030 is positioned between standard-endurance data-center SSDs and more specialized write-heavy products. The reviewed 12.8TB E3.S model uses TLC NAND and is rated for up to 14.5 GB/s reads, 10 GB/s writes and 800,000 random write IOPS. Its endurance and performance profile targets databases, metadata, HPC and AI pipelines where storage may serve as a capacity tier near accelerators.

G.Skill has introduced Flare X5X memory aimed at AMD desktop platforms. The first configuration pairs two 16GB modules at DDR5-6000 and uses EXPO Ultra Low Latency profiles to optimize secondary timings for Ryzen processors. The product expands the selection of tuned consumer DDR5 kits, while its value position cannot be assessed until retail pricing and availability are known.

CXMT says it has begun producing LPDDR6 for an upcoming Xiaomi smartphone, according to reporting cited by Tom's Hardware. LPDDR6 introduces PAM3 signaling, higher transfer rates and a narrower interface than LPDDR5-class memory, requiring changes in both hardware and software. A single design win does not prove broad manufacturing parity, but it indicates that CXMT is participating earlier in a new mobile-memory generation than in previous cycles.

China's memory sector is advancing on both major product fronts, according to DigiTimes. The report says YMTC is approaching SK hynix in NAND revenue share and operating a more advanced layer mix, while CXMT is progressing with high-k DRAM manufacturing and a broader HBM roadmap. Greater competitive capability could diversify supply and weigh on pricing over time, though execution and production scale remain decisive.

SK hynix has broken ground on an advanced packaging facility in West Lafayette, Indiana, backed by an investment of more than $4 billion. The company says the site will support next-generation HBM production in the United States and is targeting the second half of 2029 for volume output. The project expands geographic diversity for AI-memory packaging, although its supply effect is several years away.

A forecast cited by EE Times Asia puts DRAM and NAND Flash at 68% of major cloud service provider capital expenditure in 2027. The projection highlights how AI infrastructure is shifting spending toward memory and storage, with higher contract pricing amplifying the dollar value of purchases. If the forecast holds, suppliers may retain pricing leverage while cloud operators face a larger memory component in infrastructure costs.

The dispute concerns a request to replace Micron's current bonus structure with profit sharing during the AI-driven memory upswing. The report says 80% of participating workers indicated willingness to strike, citing compensation at Samsung and SK hynix. Support for action does not mean a strike has begun, and the source reports no interrupted wafer output. Escalation would still create operational risk because Taiwan is important to Micron's manufacturing footprint.

The company held a groundbreaking ceremony in West Lafayette at Purdue University. SK hynix describes the project as a first step toward establishing a local production base for AI-focused memory in the United States. The ceremony is an investment milestone, but commercial output has not begun. The location also connects the project with Purdue's engineering ecosystem.

A report says YMTC wants to overtake Samsung and SK hynix in the NAND market within roughly sixteen months. Reaching that target would require the company to nearly double its market share, implying a substantial production and customer ramp. The goal remains a reported objective rather than completed capacity. If achieved, expansion at that scale could materially alter competitive NAND supply.