All published memory-market news.

Apple raised prices across much of its iPhone lineup following the September 9 launch of its latest Pro models, according to TechPowerUp. The report says the iPhone 18 Pro and Pro Max start at US$1,199 and US$1,299, respectively, and that several retained models also received US$100 increases without hardware changes. The article attributes the timing to rising DRAM and storage costs as AI data-center demand absorbs memory supply. It also notes that other PC-system makers have adjusted prices as DRAM and SSD costs rose. Apple has not, in the supplied material, provided a detailed cost breakdown or explicitly confirmed that memory is the cause of each price change. The price increases are factual product-market data, while the precise contribution of DRAM and NAND costs remains the report's interpretation.

CXMT is reportedly encountering low yields in HBM3E risk production, according to TechPowerUp's account of South Korean media reports. The article says roughly three of every four HBM3E stacks are defective, implying a yield near 25%. The report attributes the challenge in part to immaturity in through-silicon-via technology, which is central to connecting stacked DRAM dies. It also says CXMT is attempting an eight-high HBM3E configuration while its established competitors are progressing toward newer HBM generations. The yield figures, production status, and technical comparisons are reported rather than confirmed by CXMT in the supplied material. The development should therefore be treated as a reported indicator of the execution gap in China's high-bandwidth-memory manufacturing efforts, not a verified company disclosure.

Samsung Electronics has opened an advanced packaging research center in Yokohama, according to DigiTimes. The report says the move brings development work closer to Japanese suppliers of materials and equipment that are important to high-bandwidth-memory packaging. Advanced packaging has become a major differentiator in the HBM market because the technology depends on integrating memory stacks, logic, interconnects, and thermal solutions. The reported center may help Samsung coordinate development with its supplier base as it works to narrow the HBM market-share gap with SK Hynix. The supplied source does not disclose the center's staffing, investment, specific supplier relationships, technology milestones, or effect on HBM output. It is a supply-chain and R&D positioning signal rather than evidence of an immediate production increase.

Apple has reportedly entered a long-term NAND flash supply agreement as it seeks more reliable volume from memory manufacturers, according to DigiTimes. The report says the company is prioritizing supply guarantees over its historical emphasis on securing lower component prices. The reported strategy reflects a market in which AI infrastructure demand is tightening memory availability. For large device makers, long-term agreements can reduce exposure to constrained supply, but they can also limit flexibility when demand or prices change. The supplied source does not identify a confirmed supplier, contract duration, volumes, pricing, or the precise terms of any agreement. The report names Kioxia as a potential recipient, so this should be treated as reported supply-chain positioning rather than a confirmed bilateral contract announcement.

Kioxia has ruled out deeper manufacturing ties with SK Hynix and is reportedly resisting another aggressive round of NAND price increases, according to DigiTimes. The report says the company is instead emphasizing longer customer contracts and disciplined capacity expansion. The approach comes as data-center demand keeps memory supply tight, the report says. Longer contracts can give suppliers and customers more predictability when spot conditions are volatile, while controlled capacity growth can help producers avoid abrupt changes in market balance. The supplied source does not identify the customer contracts, pricing terms, capacity figures, or timeframe for Kioxia's production plans. The item is a supplier-strategy signal rather than a comprehensive measure of NAND pricing conditions.

Samsung Electronics and ASML have announced an expanded strategic partnership centered on High-NA EUV lithography and advanced semiconductor manufacturing technologies. The companies say the work is intended to accelerate the development and deployment of next-generation capabilities. For Samsung, deeper cooperation around leading-edge lithography is relevant to its broader semiconductor roadmap, which spans both logic and memory technologies. High-NA EUV is a potential enabler for continued process scaling where patterning complexity and precision become more demanding. The supplied announcement does not identify joint-development milestones, fab locations, equipment volumes, investment amounts, or memory-product deployment dates. It is a strategic manufacturing signal rather than a confirmed change to Samsung's DRAM or HBM output.

ASUS and Galax have raised prices for selected GeForce RTX 50-series graphics cards, according to TechPowerUp. The report says the increases range from roughly US$22 to US$74 in China depending on the model. The article attributes the adjustments to rising GDDR7 costs and says similar pressure had already prompted earlier changes among Nvidia board partners. Graphics-card pricing can reflect the cost of both GPU silicon and high-performance graphics memory, making GDDR7 a relevant input for the wider hardware market. The supplied material does not include contract prices, memory-kit purchase terms, or a complete list of affected products and regions. The item is a channel-pricing signal tied to reported GDDR7 cost pressure rather than a direct measure of the memory market.

TSMC has reportedly asked materials and equipment suppliers to develop microbump bonding and underfill processes at the 5-micron class for advanced HBM packaging, according to DigiTimes' account of an ETNews report. The reported work suggests that conventional microbumps may continue to be scaled for high-bandwidth-memory integration rather than being displaced immediately by hybrid bonding. Packaging interconnect density is increasingly important as AI accelerators combine multiple dies and memory stacks. The supplied report does not give a production timeline, supplier list, qualification status, or confirmation of deployment in a specific HBM generation. It is a packaging-roadmap signal rather than evidence of a confirmed manufacturing transition.

TrendForce estimates that DRAM industry revenue reached nearly US$154.73 billion in the second quarter of 2026, up 59.5% from the previous quarter, according to a report carried by TechPowerUp. The report attributes the revenue increase to higher traditional DRAM contract prices and supply expansion that continued to trail demand growth. The source also points to AI-server demand as a driver of higher shipments for HBM3E, LPDDR5X, and high-capacity RDIMMs. Growth in AI training and inference workloads can increase demand across multiple memory products rather than only one segment. The supplied article does not include the underlying regional, supplier, or product-level revenue breakdowns. The figures should be interpreted as TrendForce's market-research estimate rather than audited industry totals.

Memory inventories at Samsung Electronics and SK Hynix have reportedly fallen below ten days of supply, according to DigiTimes' account of a Sept. 7 KB Securities report. The source attributes the tighter inventory position to simultaneous demand for HBM, server DRAM, and enterprise SSDs. The report describes a market where AI infrastructure spending is drawing on several memory categories at once. Tight inventories can make supply chains more sensitive to changes in demand, manufacturing execution, and product mix. The supplied material does not disclose the inventory measurement methodology, individual product inventories, contract-pricing data, or the duration of the reported condition. It is a securities-research signal of tight memory availability rather than a complete assessment of global supply.

Samsung Foundry is reportedly allocating a substantial share of its 4 nm manufacturing capacity to HBM4 base dies, according to TechPowerUp's report on Korean media coverage. The report says roughly half of the foundry's SF4 capacity is being directed to this work. HBM4 base dies can incorporate logic such as memory controllers and PHYs, allowing customers to move some functions closer to the memory stack. The report links the allocation to rising interest from ASIC customers and to the next HBM4 and HBM4E generations. The supplied material does not identify the underlying Korean-media source, exact capacity figures, confirmed customer orders, or production timing. It should therefore be read as a reported capacity-allocation signal, not a confirmed Samsung production forecast.

ICY Tech has introduced uHBM and uLPU architectures for AI inference, according to DigiTimes. The company is positioning persistent MRAM-based computing across a roadmap that spans compute-memory dies, chips, modules, 2U trays, and rack-scale systems. The approach reflects efforts to address AI-inference workloads with closer integration between compute and persistent memory. If brought to commercial scale, such architectures could broaden the range of memory technologies considered for inference infrastructure. The supplied source does not provide technical specifications, manufacturing partners, customer commitments, commercial shipment dates, or performance comparisons. The announcement is therefore a technology-roadmap signal rather than evidence of material near-term displacement of HBM or conventional DRAM.

SK Hynix is accelerating its transition to 1c DRAM, according to DigiTimes. The report says the sixth-generation 10nm-class process is expected to represent roughly 34% of the company's DRAM output by the fourth quarter. The transition is linked in the report to SK Hynix's preparation for HBM4E and to its effort to improve manufacturing efficiency. Process migration can be significant for memory producers because it affects the cost base and the technology available for future product generations. The supplied source does not specify absolute wafer capacity, output growth, HBM4E qualification timing, or customer volumes. The item is therefore a manufacturing and cost-efficiency signal rather than evidence of an immediate change in DRAM market supply.

DigiTimes reports that Nvidia has announced NVHBM, described by the source as a next-generation custom HBM technology. The initiative is presented as part of Nvidia's NVLink Fusion ecosystem for AI infrastructure. The report links the announcement to the growing importance of system-level integration across compute, memory, interconnects, and thermal management as large AI models increase infrastructure requirements. Custom memory architecture could give Nvidia another lever in the design of tightly integrated AI systems. The supplied material does not identify memory suppliers, specifications, production timing, volumes, or commercial products using NVHBM. It is therefore an important demand-and-architecture signal for the HBM ecosystem, not evidence of an immediate change in HBM supply or pricing.

DigiTimes reports that Micron Technology is looking to move away from a project-by-project approach to construction in Taiwan. The company is reportedly seeking longer-term agreements and reserved capacity with a smaller group of trusted construction and facility-engineering partners. The report places the move in the context of a global race to build semiconductor fabs, which is putting pressure on Taiwan's construction and engineering supply chain. Securing specialist capacity can reduce execution risk for complex fab projects as more semiconductor investment competes for the same resources. The supplied source does not identify particular Micron sites, partners, investment amounts or new wafer-capacity targets. The item is therefore a manufacturing-execution signal rather than evidence of an immediate change in DRAM supply or pricing.

DigiTimes reports that Tokyo Electron's Taiwan president sees AI-driven semiconductor demand moving into new areas, including advanced packaging, DRAM, high-bandwidth memory and NAND flash. The comments place Taiwan at the center of the expanding AI supply chain. According to the report, Tokyo Electron plans to deepen its technology, service and research relationships locally. For memory markets, the message reinforces how AI demand is linking wafer-process equipment, advanced packaging and both volatile and flash memory. The supplied source does not provide orders, capacity targets or a numerical demand forecast. It therefore signals strategic direction and industry confidence rather than a measurable near-term supply or price change.

TechPowerUp reports from IFA 2026 that ADATA is expanding its enterprise and industrial storage business under the TRUSTA brand. The reported T7P5 SSD range uses 3D NAND flash with an eTLC architecture and is offered in U.2, E1.S and E3.S form factors. The drives are listed in capacities from 1.6 TB to 7.68 TB, with claimed sequential read speeds of up to 13.5 GB/s and write speeds of up to 10.3 GB/s over PCIe Gen 5 x4. The form-factor options target differing server and workstation storage needs. The launch adds another supplier offering high-performance enterprise SSDs, although the source provides no shipment volumes, pricing or NAND sourcing information. Its direct effect on the NAND market is therefore unclear.

DigiTimes reports that China's memory industry is moving away from reliance on a single national champion toward a more specialized structure. The publication identifies CXMT with DRAM, Yangtze Memory Technologies with 3D NAND, and Wuhan Xinxin Semiconductor Manufacturing with NOR flash, 3D integration and optoelectronics. The reported division of effort covers several distinct memory and adjacent-technology segments. It could allow each company to concentrate investment and product development on a narrower set of markets rather than duplicating the same roadmap. The supplied report does not include capacity targets, financial commitments or production timelines. Its near-term effect on global DRAM and NAND pricing is therefore unclear, but it is relevant to the long-term competitive structure of memory supply.

According to DigiTimes, TSMC is urging memory designers to make future HBM and DRAM products more compatible with X-ray inspection. The report links the request to increasingly complex advanced packages, where buried defects are more difficult to detect. The article also points to a design challenge for sensitive memory: inspection methods must provide enough visibility into dense packages while managing concerns about radiation exposure. That places testability alongside bandwidth, density and packaging integration as a consideration for next-generation HBM. The supplied source does not specify a new standard, product or qualification deadline. The development is best understood as a packaging and manufacturing-design signal rather than an immediate change in memory supply or pricing.

AMD introduced the Threadripper Halo Station at IFA 2026, according to TechPowerUp. The liquid-cooled workstation uses a 96-core Threadripper PRO 9995WX processor and can support up to four Instinct MI350P accelerators. The platform supports as much as 2 TB of DDR5 system memory. Each MI350P card carries 144 GB of HBM3E with 4 TB/s of bandwidth, allowing a four-accelerator configuration to reach 576 GB of HBM3E. AMD demonstrated a system with two cards, providing 288 GB of accelerator memory. The design shows how high-capacity DDR5 and HBM3E are moving into workstation-class systems intended to run very large models locally. AMD has not announced complete specifications, availability or pricing, so the near-term demand impact cannot be quantified from the supplied source.