All published memory-market news.

Memory inventories at Samsung Electronics and SK Hynix have reportedly fallen below ten days of supply, according to DigiTimes' account of a Sept. 7 KB Securities report. The source attributes the tighter inventory position to simultaneous demand for HBM, server DRAM, and enterprise SSDs. The report describes a market where AI infrastructure spending is drawing on several memory categories at once. Tight inventories can make supply chains more sensitive to changes in demand, manufacturing execution, and product mix. The supplied material does not disclose the inventory measurement methodology, individual product inventories, contract-pricing data, or the duration of the reported condition. It is a securities-research signal of tight memory availability rather than a complete assessment of global supply.

Samsung Foundry is reportedly allocating a substantial share of its 4 nm manufacturing capacity to HBM4 base dies, according to TechPowerUp's report on Korean media coverage. The report says roughly half of the foundry's SF4 capacity is being directed to this work. HBM4 base dies can incorporate logic such as memory controllers and PHYs, allowing customers to move some functions closer to the memory stack. The report links the allocation to rising interest from ASIC customers and to the next HBM4 and HBM4E generations. The supplied material does not identify the underlying Korean-media source, exact capacity figures, confirmed customer orders, or production timing. It should therefore be read as a reported capacity-allocation signal, not a confirmed Samsung production forecast.

ICY Tech has introduced uHBM and uLPU architectures for AI inference, according to DigiTimes. The company is positioning persistent MRAM-based computing across a roadmap that spans compute-memory dies, chips, modules, 2U trays, and rack-scale systems. The approach reflects efforts to address AI-inference workloads with closer integration between compute and persistent memory. If brought to commercial scale, such architectures could broaden the range of memory technologies considered for inference infrastructure. The supplied source does not provide technical specifications, manufacturing partners, customer commitments, commercial shipment dates, or performance comparisons. The announcement is therefore a technology-roadmap signal rather than evidence of material near-term displacement of HBM or conventional DRAM.

SK Hynix is accelerating its transition to 1c DRAM, according to DigiTimes. The report says the sixth-generation 10nm-class process is expected to represent roughly 34% of the company's DRAM output by the fourth quarter. The transition is linked in the report to SK Hynix's preparation for HBM4E and to its effort to improve manufacturing efficiency. Process migration can be significant for memory producers because it affects the cost base and the technology available for future product generations. The supplied source does not specify absolute wafer capacity, output growth, HBM4E qualification timing, or customer volumes. The item is therefore a manufacturing and cost-efficiency signal rather than evidence of an immediate change in DRAM market supply.

DigiTimes reports that Nvidia has announced NVHBM, described by the source as a next-generation custom HBM technology. The initiative is presented as part of Nvidia's NVLink Fusion ecosystem for AI infrastructure. The report links the announcement to the growing importance of system-level integration across compute, memory, interconnects, and thermal management as large AI models increase infrastructure requirements. Custom memory architecture could give Nvidia another lever in the design of tightly integrated AI systems. The supplied material does not identify memory suppliers, specifications, production timing, volumes, or commercial products using NVHBM. It is therefore an important demand-and-architecture signal for the HBM ecosystem, not evidence of an immediate change in HBM supply or pricing.

DigiTimes reports that Micron Technology is looking to move away from a project-by-project approach to construction in Taiwan. The company is reportedly seeking longer-term agreements and reserved capacity with a smaller group of trusted construction and facility-engineering partners. The report places the move in the context of a global race to build semiconductor fabs, which is putting pressure on Taiwan's construction and engineering supply chain. Securing specialist capacity can reduce execution risk for complex fab projects as more semiconductor investment competes for the same resources. The supplied source does not identify particular Micron sites, partners, investment amounts or new wafer-capacity targets. The item is therefore a manufacturing-execution signal rather than evidence of an immediate change in DRAM supply or pricing.

DigiTimes reports that Tokyo Electron's Taiwan president sees AI-driven semiconductor demand moving into new areas, including advanced packaging, DRAM, high-bandwidth memory and NAND flash. The comments place Taiwan at the center of the expanding AI supply chain. According to the report, Tokyo Electron plans to deepen its technology, service and research relationships locally. For memory markets, the message reinforces how AI demand is linking wafer-process equipment, advanced packaging and both volatile and flash memory. The supplied source does not provide orders, capacity targets or a numerical demand forecast. It therefore signals strategic direction and industry confidence rather than a measurable near-term supply or price change.

TechPowerUp reports from IFA 2026 that ADATA is expanding its enterprise and industrial storage business under the TRUSTA brand. The reported T7P5 SSD range uses 3D NAND flash with an eTLC architecture and is offered in U.2, E1.S and E3.S form factors. The drives are listed in capacities from 1.6 TB to 7.68 TB, with claimed sequential read speeds of up to 13.5 GB/s and write speeds of up to 10.3 GB/s over PCIe Gen 5 x4. The form-factor options target differing server and workstation storage needs. The launch adds another supplier offering high-performance enterprise SSDs, although the source provides no shipment volumes, pricing or NAND sourcing information. Its direct effect on the NAND market is therefore unclear.

DigiTimes reports that China's memory industry is moving away from reliance on a single national champion toward a more specialized structure. The publication identifies CXMT with DRAM, Yangtze Memory Technologies with 3D NAND, and Wuhan Xinxin Semiconductor Manufacturing with NOR flash, 3D integration and optoelectronics. The reported division of effort covers several distinct memory and adjacent-technology segments. It could allow each company to concentrate investment and product development on a narrower set of markets rather than duplicating the same roadmap. The supplied report does not include capacity targets, financial commitments or production timelines. Its near-term effect on global DRAM and NAND pricing is therefore unclear, but it is relevant to the long-term competitive structure of memory supply.

According to DigiTimes, TSMC is urging memory designers to make future HBM and DRAM products more compatible with X-ray inspection. The report links the request to increasingly complex advanced packages, where buried defects are more difficult to detect. The article also points to a design challenge for sensitive memory: inspection methods must provide enough visibility into dense packages while managing concerns about radiation exposure. That places testability alongside bandwidth, density and packaging integration as a consideration for next-generation HBM. The supplied source does not specify a new standard, product or qualification deadline. The development is best understood as a packaging and manufacturing-design signal rather than an immediate change in memory supply or pricing.

AMD introduced the Threadripper Halo Station at IFA 2026, according to TechPowerUp. The liquid-cooled workstation uses a 96-core Threadripper PRO 9995WX processor and can support up to four Instinct MI350P accelerators. The platform supports as much as 2 TB of DDR5 system memory. Each MI350P card carries 144 GB of HBM3E with 4 TB/s of bandwidth, allowing a four-accelerator configuration to reach 576 GB of HBM3E. AMD demonstrated a system with two cards, providing 288 GB of accelerator memory. The design shows how high-capacity DDR5 and HBM3E are moving into workstation-class systems intended to run very large models locally. AMD has not announced complete specifications, availability or pricing, so the near-term demand impact cannot be quantified from the supplied source.

StorageReview reports that Amazon Web Services has launched the R9g and R9gd instance families based on Graviton5 processors. The Arm-based systems target databases, in-memory caches, analytics, containers and microservices that benefit from high memory bandwidth. AWS says the new instances can deliver up to 25% higher per-vCPU compute performance than the prior Graviton4 R8g family. The platform raises memory speed from DDR5-5600 to DDR5-8800 MT/s and increases L3 cache capacity fivefold. On the largest r9g.48xlarge configuration, AWS lists up to 100 Gbps of network bandwidth and 72 Gbps of Amazon EBS bandwidth. The launch is a demand-side signal for faster server DDR5 platforms. It does not disclose memory volumes or purchasing plans, so its direct effect on DRAM pricing is unclear.

DigiTimes reports that AI infrastructure spending continued to lift demand for both conventional DRAM and high-bandwidth memory during the second quarter of 2026. The publication says Samsung regained the leading position in the DRAM market while China's CXMT increased its presence. The combination of stronger AI demand and broader supplier participation illustrates two forces shaping the market at once: high-value HBM requirements are expanding, while Chinese producers are seeking a larger role in the broader DRAM landscape. The supplied report provides no market-share or pricing figures. It supports a view of firm AI-related demand, but does not by itself establish a near-term direction for DRAM prices.

Montage Technology is moving beyond its traditional DDR memory-interface business with CXL 3.2, DDR6 and PCIe products aimed at AI data-center infrastructure, according to DigiTimes. The publication says the Chinese interconnect chipmaker has entered CXL 3.2 supply chains connected to Samsung and SK hynix. The move highlights how memory-interface and interconnect vendors are preparing for systems that combine faster DDR generations with pooled and expandable memory. CXL can allow compute platforms to attach and share memory resources more flexibly, while DDR6 development points to the next generation of server-memory interfaces. The supplied report does not specify the products, volumes or qualification dates involved. Its immediate price impact is therefore unclear, but it is relevant to the developing ecosystem around future server memory.

DigiTimes reports that Micron is targeting approximately 100,000 HBM wafers per month by the end of 2026, which would represent roughly twice its current high-bandwidth-memory capacity. The report also says the company plans a substantial increase in 12-high HBM4 output for NVIDIA's Vera Rubin AI platform. Samsung and SK hynix retain a scale advantage in HBM, according to the report. If Micron reaches the stated capacity target, the industry would have a larger pool of supply for advanced AI memory. The supplied source does not provide a commissioning schedule, customer volumes or independent confirmation of the capacity plan. It should therefore be treated as a reported target rather than a completed expansion.

According to DigiTimes, Kioxia is advancing a strategy to use flash memory in roles that have historically relied on DRAM. The report frames the effort against Kioxia's position as a major NAND supplier without its own DRAM manufacturing business. The same report says Kioxia faces stronger competition from Micron and China's YMTC in flash. Moving more workloads toward flash could help the company differentiate its product strategy, but the supplied report does not provide product specifications, deployment timelines or customer commitments. The development is therefore best viewed as a strategic direction rather than a confirmed near-term shift in DRAM demand or pricing. Any market effect will depend on technical adoption and the economics of the targeted workloads.

EE Times Asia reports that Marvell is presenting three product lines as parts of one memory-disaggregation approach: the Bravera SC6 PCIe 6.0 SSD controller, Structera CXL products for memory expansion and pooling, and Photonic Fabric components for optical shared-memory designs. The company positions the portfolio across server storage, rack-scale memory pooling and multi-rack shared-memory architectures. In the storage layer, the Bravera controller is intended for AI-oriented workloads such as key-value caching, where placing more data on SSDs can improve infrastructure efficiency. For memory markets, the significance is architectural rather than an immediate supply event. Wider deployment of CXL and SSD-backed data tiers could alter how hyperscalers allocate DDR memory and NAND capacity as AI clusters scale.

TrendForce data cited by EE Times Asia puts the quarter-on-quarter increase in combined revenue for the five leading enterprise SSD vendors at 103.6%. The report attributes the growth to higher shipments and contract prices as cloud operators expand AI infrastructure. Samsung led the group with about $14.35 billion in revenue, followed by SK hynix Group at more than $8.63 billion. Micron recorded the fastest growth, rising 126.3% from the prior quarter to roughly $6.98 billion. Kioxia generated about $4.64 billion and SanDisk nearly $2.98 billion. The report expects enterprise SSD demand to remain strong in the third quarter, supported by generative-AI services, continued cloud deployment and shipments of NVIDIA GB-series server racks. The growing role of high-capacity QLC drives and newer PCIe products points to sustained demand for enterprise NAND, although additional Chinese supply and domestic cloud demand could change the competitive balance over time.

Global NAND revenue increased 70% in the second quarter of 2026 after a 90% increase in the first quarter, according to Counterpoint Research data cited by TechPowerUp. The source attributes the expansion primarily to higher pricing, with NAND contract prices rising 55% sequentially during the quarter. Samsung led the market with 28% revenue share, followed by SK hynix at 19% and Micron at 15%, while YMTC reached 14%. The report links the tight market to AI infrastructure demand for high-capacity enterprise flash, which has encouraged suppliers to prioritize higher-margin data-center products over client SSD capacity. The market-share figures are revenue-based and should not be interpreted as shipment shares.

Micron's 6600 ION places 245TB of QLC NAND in one enterprise SSD, and StorageReview's analysis frames its value around data-center power and floor space rather than raw capacity alone. In the publication's test configuration, one drive replaced eight 30TB nearline hard drives. The SSD system consumed 170.2W during sequential writes, compared with 173.5W for the hard-drive configuration at idle. StorageReview estimates that replacing disk with flash at exabyte scale could reduce a best-case footprint from 22 racks to six and free enough power from fewer than three racks of drives to operate a GB200 NVL72. The figures are workload-specific lab measurements, but they illustrate why ultra-dense QLC flash is becoming an AI-infrastructure planning tool.