RamTrend

Memory news intelligence

All published memory-market news.

Latest RamTrend editorial notes, ordered by publication time, with a price-impact index for each DRAM, NAND, DDR, and storage-market signal.

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Rambus has introduced a DDR5-9600 RDIMM chipset for next-generation server platforms, aiming at the rising memory bandwidth and power-delivery demands of AI and HPC workloads. The launch is relevant to the memory market because it reflects continued pressure to push server DIMM performance higher as inference and agentic AI deployments scale.

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Rambus announced a new DDR5-9600 server RDIMM chipset built around its sixth-generation Registering Clock Driver, RCD06. According to the company, the new platform raises data rate by 20% versus the prior generation and supports RDIMMs operating at up to 9600 MT/s for advanced CPU-based data center systems. The complete chipset also includes the PMIC5030, an SPD hub with integrated temperature sensing, and separate temperature sensor ICs. Rambus says the goal is to simplify module design while improving signal integrity, power delivery and telemetry for high-speed server memory. For RamTrend, the key significance is not immediate DRAM pricing but the continued move toward higher-performance server memory subsystems as AI inference, KV caching and larger CPU memory footprints increase bandwidth and capacity requirements. That trend can support stronger demand for premium server memory configurations and the supporting interface components around them.

RambusDDR5RDIMMRCD06PMIC5030
Source: Rambus News

SiPearl's Rhea CPU has entered lab bring-up with an architecture that combines on-package HBM2E and large DDR5 capacity for European HPC systems.

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Rhea is not a high-volume memory catalyst yet, but it is a useful design signal. The processor includes 64 GB of on-package HBM2E and supports up to 2 TB of DDR5 per socket, showing that sovereign HPC projects are also adopting bandwidth-heavy memory architectures. Availability is still scheduled around the end of 2026, so the near-term market effect is limited, but the design reinforces HBM's spread beyond GPU-only AI accelerators.

SiPearlTSMCHBM2EDDR5HPC CPUson-package memory
Source: Tom's Hardware

Omdia expects a sharp decline in sub-$400 smartphone shipments as DRAM and NAND costs take a larger share of low-end device bills of materials.

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The item shows the AI memory cycle moving beyond PCs and servers into consumer-device planning. In lower-priced smartphones, memory costs can now dominate the hardware cost base, leaving vendors with fewer ways to protect margins without cutting specifications or reducing production. That makes mobile demand more vulnerable even as DRAM, NAND, and HBM suppliers prioritize higher-return capacity for AI and data-center customers.

SamsungSK hynixMicronDRAMNAND FlashHBMDDR5
Source: Tom's Hardware

DIGITIMES reports that the AI-led memory upcycle is creating broader strain as component buyers absorb sharper cost increases.

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This is a pricing story with a second-order risk attached. AI demand is pulling the memory market into a stronger cycle, while companies further down the supply chain face higher input costs in markets where they may not have matching pricing power. The antitrust framing matters because rapid price increases can draw attention from customers and regulators even when the underlying pressure is capacity allocation and demand concentration.

DRAMAI memorymemory supply chain
Source: DigiTimes Daily

Samsung Chairman Jae-yong Lee's trip to the Sun Valley Conference is being watched as another push to build closer AI relationships with major technology customers.

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The reported visit is strategically relevant because AI customer access is now tightly linked to premium memory opportunities. Samsung is trying to strengthen its position with large AI buyers and partners while competitors also chase high-value data-center memory demand. The immediate price signal is modest because no supply agreement was disclosed, but the trip underlines how senior-level business development has become part of the HBM competition.

SamsungHBMAI infrastructuredata-center memory
Source: DigiTimes Daily

EE Times Asia argues that real-time LLM inference can still be constrained by memory behavior even when GPU throughput benchmarks look strong.

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The article separates AI inference into phases and highlights token generation as the harder real-time workload. For RamTrend, the takeaway is that accelerator performance is increasingly judged by how quickly systems can move and reuse model data, not only by raw compute throughput. That keeps bandwidth, cache design, and memory-adjacent architecture choices central to AI infrastructure planning, although the item does not announce a new memory order or supply change.

LLM inferenceAI acceleratorsmemory bandwidthKV cache
Source: EE Times Asia

IEEE Spectrum reports on research into sideways DRAM stacking that could address heat, bandwidth, and capacity constraints facing future HBM designs.

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IEEE Spectrum highlights two research paths that try to rethink how high-bandwidth memory is built for AI systems. Instead of simply making taller DRAM stacks, researchers are exploring structures that place memory dies side by side and connect them to processors in new ways. The motivation is clear: AI accelerators need more memory bandwidth and capacity, but taller HBM stacks create thermal and wiring challenges. The article discusses V-Die work from South Korean researchers and MOSAIC work from Japanese researchers, both aimed at improving memory density or bandwidth without letting heat become the limiting factor. For RamTrend, this is a long-term technology signal rather than a pricing event. If such architectures mature, they could reshape future HBM4-and-beyond roadmaps by reducing thermal limits and increasing effective capacity near accelerators. For now, the work remains research-stage and does not change near-term HBM supply.

MicronNvidiaDRAMHBMHBM4V-Die
Source: IEEE Spectrum Semiconductors

DigiTimes reports that Apple is testing CXMT DRAM for China-market devices while Beijing looks to the company as a domestic AI supply-chain anchor.

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CXMT is moving deeper into the global memory spotlight, according to DigiTimes. The report says Apple is testing CXMT DRAM for devices sold in China, while Chinese policy support increasingly treats the company as a key piece of the domestic AI supply chain. The significance is supplier validation. Apple testing does not guarantee adoption, volume, or regulatory clearance, but it shows that CXMT is no longer only a local alternative for low-end DRAM. Combined with recent signs of faster CXMT-based DDR5 modules, the company is starting to appear in discussions about both consumer products and strategic AI supply. For RamTrend, the pricing implication is mixed. If CXMT gains real commercial traction, it could add supply competition in some DRAM segments. At the same time, China-market localization and AI policy demand could absorb more of CXMT's output internally, limiting how much pressure reaches global DRAM pricing.

CXMTAppleDRAMmemory chip
Source: DigiTimes Daily

DigiTimes reports that Samsung's PM1763 PCIe 6.0 enterprise SSD is aimed at next-generation AI infrastructure, including Nvidia's Vera Rubin platform.

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Samsung's PM1763 enterprise SSD has already been a clear premium NAND story, but the DigiTimes report adds an important platform angle: the drive is described as part of Samsung's AI memory strategy beyond HBM and tied to Nvidia's next-generation Vera Rubin roadmap. The signal is that AI memory demand is expanding into storage layers. HBM remains central to accelerator performance, but large AI systems also need very fast enterprise SSDs to move model data and training sets efficiently. A PCIe 6.0 eSSD gives Samsung another route to capture AI infrastructure spending with advanced NAND, controllers, and system-level validation. For RamTrend, this reinforces the idea that AI demand is pulling both DRAM and NAND vendors toward higher-value platforms. It does not change the previously published PM1763 production story, but it adds context about how Samsung may position enterprise storage alongside HBM in AI server designs.

SamsungNvidiaenterprise SSDSSDHBMNAND
Source: DigiTimes Daily

Samsung is using HBM4 to prove whether its memory, logic, foundry, and advanced packaging units can act as one AI semiconductor platform.

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DigiTimes reports that Samsung's HBM4 effort is becoming a test of the company's ability to coordinate multiple semiconductor businesses. The story frames Samsung's advantage not as a single memory die, but as the combination of memory design, logic capability, foundry resources, and advanced packaging. That matters because HBM4 competition is increasingly tied to customization and integration. AI accelerator customers need memory that fits power, bandwidth, thermal, and package requirements, so suppliers with stronger co-design and packaging options may have a better chance of winning next-generation sockets. For RamTrend, the market signal is competitive positioning. SK hynix has led the HBM cycle, while Samsung is trying to turn its broader portfolio into a clearer advantage. If Samsung executes, HBM4 supply could become more competitive; if it misses, pricing power may remain concentrated with current leaders.

SamsungSK hynixHBMHBM4advanced packaging
Source: DigiTimes Daily

Hanmi Semiconductor is moving from HBM-focused tools toward broader advanced packaging demand while ASE expands capacity tied to TSMC-linked workloads.

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DigiTimes reports that Hanmi Semiconductor is broadening its equipment focus from high-bandwidth-memory tools into advanced chip packaging. At the same time, ASE is expanding capacity to address demand connected to TSMC's advanced packaging ecosystem. The relevance for RamTrend is the packaging bottleneck around AI accelerators. HBM demand depends not only on stacked DRAM output, but also on the packaging capacity and tools needed to integrate memory close to processors. If OSAT capacity and packaging equipment availability improve, it can help relieve one constraint in the AI memory supply chain. This is not a direct HBM price report, but it is a meaningful infrastructure signal. More investment around CoWoS-related packaging can support higher HBM throughput over time, while also showing that suppliers and equipment makers expect advanced packaging demand to stay strong into the second half of 2026 and beyond.

Hanmi SemiconductorASETSMCHBMCoWoSadvanced packagingpackaging equipment
Source: DigiTimes Daily

ADATA's first-half 2026 revenue has already exceeded its full-year 2025 result, with the company pointing to AI-led memory demand.

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ADATA posted another record month in June 2026, according to DigiTimes. First-half consolidated revenue reached NT$64.27 billion, or about US$2.0 billion, already above the company's NT$53.04 billion full-year 2025 total. The data point matters because ADATA sits close to module and channel demand. Strong revenue at a memory module maker suggests the upcycle is flowing beyond upstream suppliers into branded DRAM and module sales. The company linked the performance to AI-driven demand and described the current environment as a new memory supercycle. For RamTrend, this supports the view that pricing and volume momentum are broadening. AI demand remains the headline driver, but module makers can benefit when buyers secure inventory across consumer, enterprise, and industrial channels before supply tightens further.

ADATADRAMmemory module
Source: DigiTimes Daily

DigiTimes reports that 3Q26 contract talks are tightening for DDR4 8Gb parts as AI demand strains both DRAM and flash supply.

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DigiTimes is flagging another sign that the memory upcycle is reaching older product categories. Its report says third-quarter 2026 negotiations point to higher DDR4 8Gb contract prices, with enterprise SSD shortages and AI-related demand adding pressure across DRAM and flash supply. The key market point is the spillover effect. AI infrastructure demand is not only lifting premium HBM and enterprise SSD demand; it is also affecting supply balance in more mature components used in PCs, networking equipment, data centers, and industrial systems. When buyers see older chips become more expensive during contract negotiations, it usually means suppliers have limited flexibility to satisfy all end markets at once. For RamTrend, this is a direct pricing signal. It suggests that tightness in high-value AI storage and memory can pull capacity, allocation, and pricing power away from legacy DRAM categories, supporting broader contract-price increases.

DDR4DRAMenterprise SSDSSD
Source: DigiTimes Daily

Samsung has begun mass production of its PCIe 6.0 PM1763 enterprise SSD, targeting AI and HPC servers with 9th-generation V-NAND and a new controller.

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Samsung is moving its PM1763 enterprise SSD into mass production for AI and high-performance computing servers. The drive uses Samsung's 9th-generation V-NAND and a 4nm controller, and it is offered in 4TB, 8TB, and 16TB capacities. The product is aimed at the storage bottleneck around AI training and inference. Samsung says the 16TB model reaches sequential reads of up to 28,400 MB/s and sequential writes of up to 21,900 MB/s, with performance and power-efficiency gains over PM1753. The drive is also designed for liquid-cooled server environments and includes security features for virtualized and future quantum-risk scenarios. For memory markets, this is a premium NAND demand signal rather than a broad consumer SSD story. AI clusters are pulling storage vendors toward faster enterprise SSDs that sit closer to accelerators and CPUs. Mass production of a PCIe 6.0 eSSD gives Samsung another high-value outlet for advanced V-NAND as data-center buyers scale AI infrastructure.

SamsungSSDenterprise SSDNANDV-NAND
Source: Samsung Global Newsroom Semiconductors

SK hynix is positioning its AI memory roadmap beyond HBM, connecting stacked DRAM, AI-focused DRAM, NAND, CXL, and enterprise SSDs into a broader platform strategy.

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SK hynix used a newsroom article to describe how it sees the AI memory market evolving. The company is not presenting HBM as a standalone product cycle, but as the anchor for a wider portfolio that includes AI-oriented DRAM, NAND, CXL memory modules, LPDDR products, GDDR7, and enterprise SSDs. The commercial signal is that leading memory suppliers are trying to move closer to system design. AI customers are increasingly constrained by bandwidth, power, heat, and data placement rather than raw accelerator compute alone. SK hynix is therefore emphasizing customer co-design, packaging, and production infrastructure alongside its HBM roadmap. For RamTrend, this supports the view that premium memory competition is broadening. HBM remains the highest-profile product, but AI systems also need faster storage and additional memory layers to keep accelerators fed. That can shift supplier investment toward high-margin AI platforms and away from purely commodity cycles, even if this specific article does not disclose new capacity numbers or pricing.

SK hynixSanDiskHBMHBM3EHBM4HBM4E
Source: SK hynix Newsroom

Lexar is preparing THOR II RGB DDR5 kits using CXMT chips at speeds up to 7600 MT/s, a sign that Chinese DRAM is moving further into performance desktop modules.

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Lexar is preparing new THOR II RGB DDR5 desktop kits built around CXMT memory chips, according to TechPowerUp. The upcoming 32GB dual-channel kits are described at 7200 MT/s and 7600 MT/s with CL38 timings, a clear step above earlier CXMT-based consumer modules that were positioned closer to entry-level speeds. The market signal is supplier competitiveness. If CXMT parts can support faster mainstream enthusiast kits, module vendors have another usable DRAM source beyond Samsung, SK hynix, and Micron for some retail DDR5 products. TechPowerUp also noted a recent MSI demonstration of CXMT-based DDR5 at 8000 MT/s on AMD platforms, though Lexar has not announced pricing or launch timing for these kits. For pricing, the impact is not immediate because volume, availability, and export restrictions remain open questions. But better CXMT performance can gradually increase sourcing flexibility for module brands. Over time, that could add competitive pressure in retail DDR5, especially in tiers where buyers care more about price-to-performance than top-bin overclocking records.

LexarCXMTSamsungSK hynixDDR5DRAMRAMmemory chips
Source: TechPowerUp News

South Korea's memory expansion plans depend on Samsung and SK hynix fabs, but utility infrastructure could become the schedule constraint.

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South Korea is trying to accelerate one of the world's largest semiconductor buildouts, with Samsung and SK hynix central to the plan. The program combines memory fabs, AI infrastructure, data centers, and robotics investment, making it a key part of the country's effort to defend its position in DRAM, NAND, and HBM. The limiting factor may not be cleanroom construction alone. Large memory campuses need utility capacity on the scale of major cities, and the available payload points to power delivery and water systems as the main schedule risks. If those inputs arrive later than fab shells and tools, new wafer output can be delayed even when capital spending remains aggressive. For RamTrend, the story is a medium-term supply risk. Utility bottlenecks would not change spot prices overnight, but they could slow the pace at which planned Korean memory capacity reaches volume production. That matters most for HBM and other AI-driven products, where demand is already competing for advanced manufacturing and packaging resources.

SamsungSK hynixDRAMHBMNANDwafer capacity
Source: Tom's Hardware

Lexar owner Longsys expects first-half 2026 profit to surge as AI infrastructure demand competes for limited memory wafer capacity.

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Shenzhen Longsys Electronics is guiding for a sharp increase in first-half 2026 profit, according to Tom's Hardware. The company expects net profit of about $1.36 billion to $1.62 billion, compared with roughly $2.2 million a year earlier, on revenue expected to more than double. The important signal for RamTrend is the reason behind the jump: AI infrastructure demand is pulling hard on memory and storage chips while available wafer capacity remains constrained. Longsys also said it has signed long-term agreements and memoranda with global memory wafer suppliers to support supply stability. That suggests module and branded storage companies are working to secure upstream allocation as DRAM, NAND, and HBM demand increasingly compete for the same supplier attention. This does not by itself prove a new shortage across every product category, but it reinforces the current pricing backdrop. When downstream memory and storage vendors can turn capacity access into a major earnings swing, it usually means supply allocation and component costs remain central market risks.

LongsysLexarSamsungSK hynixDRAMNANDHBMRAM
Source: Tom's Hardware

SK hynix has shipped 12-high HBM4E samples to major customers, signaling another step in the competitive roadmap for next-generation AI memory.

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SK hynix is sampling 12-layer HBM4E with major customers, according to StorageNewsletter. The compact payload cites a maximum speed of 16Gbps per pin and an updated Advanced MR-MUF process that lowers heat resistance by 17% while improving stability. The immediate market signal is roadmap progress rather than volume supply. HBM4E is positioned beyond current HBM4 ramps, and customer sampling gives hyperscalers, accelerator vendors, and memory suppliers an earlier view of performance, thermals, and integration requirements. For pricing, the direction remains supportive for premium memory: AI systems are still pulling suppliers toward high-value stacked DRAM, and each next-generation qualification cycle can keep capacity and packaging attention focused on HBM instead of commodity DRAM.

SK hynixHBM4EHBMAdvanced MR-MUF
Source: StorageNewsletter

A brokerage consensus cited by Tom's Hardware points to a much stronger 2026 profit outlook for Samsung, with higher memory and storage prices presented as the main driver.

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Samsung's semiconductor earnings expectations are being lifted by the current memory upcycle. Tom's Hardware cited brokerage consensus that puts Samsung's 2026 operating-profit outlook near 300 trillion won, while linking the surge to firmer memory and storage pricing and demand tied to AI servers. For RamTrend, the useful signal is not the headline comparison with Samsung's history, but the pricing backdrop behind it. Stronger DRAM, NAND, and HBM demand is giving large memory suppliers more earnings leverage, especially where AI infrastructure pulls capacity toward premium products. If that pricing environment holds, it supports the view that contract markets can stay tight even as suppliers continue expanding high-end output.

SamsungSK hynixMicronDRAMHBMHBM4LPDDR5X
Source: Tom's Hardware