A 27% Newegg discount brings the PCIe 4.0 drive to 15.7 cents per gigabyte during a period of generally difficult storage pricing.
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The 1TB Kingston NV3 is listed at $156.99 in a Newegg promotion reported by Tom's Hardware, down from a usual price of $215.99. That equals 15.7 cents per gigabyte and is described as the drive's lowest price in 30 days. The offer provides a short-lived consumer value point, but it does not demonstrate a broader decline in NAND or SSD prices.
The company's chief executive sees AI-led demand and customized products keeping the market constrained, with any eventual easing likely to be gradual.
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SK hynix CEO Kwak Noh-Jung expects the current memory shortage to continue through the end of 2030, according to a report citing Reuters. He argues that customized DRAM and HBM for AI systems make demand more predictable and less exposed to the abrupt oversupply cycles that previously caused price crashes. The statement extends the company's earlier expectation of tight commodity DRAM supply through 2028.
Benchmarks reported by DigiTimes place CXMT memory within roughly one percent of SK hynix's latest M-die in productivity and gaming workloads.
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CXMT DDR5 chips reportedly operated stably at 8,000 MT/s in a comparison with current SK hynix memory. DigiTimes says measured application and gaming performance differed by about one percent or less. A narrow benchmark gap suggests faster progress in high-speed Chinese DRAM, although broader conclusions still depend on yields, power, reliability and production scale.
Samsung emphasizes processing inside memory, while SK hynix is focusing on package interconnects to improve data movement and manage physical constraints.
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Samsung and SK hynix are pursuing different approaches to improve HBM system performance, DigiTimes reports. Samsung presents processing-in-memory as a way to reduce movement between compute and memory, while SK hynix is prioritizing packaging and interconnect development. The contrast shows that future HBM gains may depend as much on architecture and integration as on DRAM speed.
Apple is reportedly pressing South Korean display suppliers for lower prices as more expensive DRAM and NAND put pressure on device margins.
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Apple is negotiating lower OLED panel prices with suppliers in South Korea, according to DigiTimes. The report says higher costs for performance-oriented mobile DRAM, NAND Flash and other memory components are weighing on gross margin. Offering larger display orders in return for discounts suggests device makers are trying to offset memory inflation elsewhere in the bill of materials.
AppleSouth Korean OLED suppliersmobile DRAMNAND FlashOLED
The proposed architecture could deliver more than ten times HBM bandwidth while reducing energy per bit, according to the company.
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Micron is investigating a tightly coupled DRAM architecture intended to narrow the growing gap between processor throughput and memory bandwidth. DigiTimes reports that the concept targets more than ten times current HBM bandwidth with substantially lower energy consumption per transferred bit. The work signals a possible direction beyond today's packaging model, but the supplied material gives no production schedule or commercial specifications.
The B550M Pro-A WiFi 6E extends a mature AMD platform whose lower-cost DDR4 support is attracting renewed interest during high memory prices.
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ASRock has added the B550M Pro-A WiFi 6E, a microATX motherboard for AMD's long-running AM4 platform. The board provides four DDR4 DIMM slots with overclocked memory support up to DDR4-4733+, and the report expects pricing near $90 without a confirmed MSRP. New AM4 designs show how mature DDR4 ecosystems can remain attractive when newer memory carries a substantial cost premium.
A $215 reduction has made the 32GB Vengeance kit the least expensive option at its speed tier, even as broader DDR5 prices rise and availability tightens.
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Tom's Hardware reports a 35% discount on Corsair's 32GB DDR5-6000 Vengeance kit, reducing the price by $215. The promotion temporarily places the kit below other 32GB products at the same data rate. Because the report also notes shrinking stock and continuing price increases, the deal appears to be an isolated retail opportunity rather than evidence of a broad market decline.
A new engineering workflow aims to evaluate detailed heat behavior during early floorplanning for dense 2.5D AI accelerator packages.
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A technical whitepaper highlighted by Semiconductor Engineering focuses on bringing high-fidelity thermal analysis into the floorplanning stage of 2.5D package design. The method is intended to identify hotspots, manage rising power density and co-optimize dies and packaging within limited thermal budgets. Earlier feedback may help designers evaluate HBM placement and cooling tradeoffs before layouts become expensive to change.
The chip designer has committed up to $160 billion for memory as quarterly revenue passes $96 billion, underscoring the scale of future AI-system demand.
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Nvidia reported fiscal second-quarter 2027 revenue of $96.2 billion, according to Tom's Hardware, while committing up to $160 billion to future memory purchases. The report places total commitments at $279 billion ahead of expected demand growth. Such long-term procurement can tighten access to HBM and related memory capacity by reserving supply well before systems ship.
Samsung, SK hynix and Micron say vertical integration and wafer bonding will be needed to overcome bandwidth and power limits in interposer-based memory systems.
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Executives from the three largest DRAM suppliers used Semicon Taiwan 2026 to describe a transition beyond conventional 2.5D HBM packaging. DigiTimes reports that Samsung, SK hynix and Micron see 3D vertical stacking as a route to shorter data paths and lower transmission power. Moving to wafer-level bonding could improve AI-memory efficiency, while raising manufacturing complexity and capital requirements.
A research project from Huawei, ETH Zurich and HUST explores a flash-backed memory tier for inference systems constrained by accelerator memory capacity.
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Researchers have proposed FLINT, an architecture that uses high-bandwidth flash to increase the model capacity available to single accelerators and small inference nodes. The approach targets workloads where limited on-package memory, rather than compute throughput, is the primary bottleneck. If practical, such a tier could complement HBM with denser and less costly storage while accepting lower performance for selected data.
SK hynix may add Intel Foundry alongside TSMC for advanced logic base dies, potentially diversifying a critical part of future custom HBM production.
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SK hynix is reportedly considering Intel Foundry as a second manufacturing source for HBM4E base dies. Future HBM designs can place customer-specific controllers and interface logic in the base die beneath stacked DRAM, increasing the need for advanced foundry processes. A dual-source arrangement could reduce supplier concentration, but no contract or process node has been confirmed.
SK hynixIntel FoundryTSMCHBM4EHBM base diesadvanced logic
The 2TB Urban Tapsafe combines a 20Gbps external-storage platform with NFC unlocking, app-managed sharing and a compact clip-equipped enclosure.
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ADATA's Urban Tapsafe is a portable SSD designed around access-control and convenience features rather than maximum throughput. Tom's Hardware describes NFC-based phone unlocking, selective sharing through an app, interchangeable magnetic face plates and a five-year warranty. The product shows external-drive vendors differentiating with security and industrial design while high-end flash supply remains expensive.
The partners plan long-term investment in advanced flash capacity through 2032, including a new Kitakami facility targeted for fiscal 2029.
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Kioxia and Sandisk have outlined more than $31 billion in joint capital spending for advanced 3D NAND production in Japan through 2032. The program includes Kitakami Fab3, which is targeted for fiscal 2029, and remains dependent in part on Japanese government support. The scale of the plan signals confidence in long-term flash demand, although capacity will arrive over several years rather than immediately.
A new Katana configuration uses older-generation SO-DIMMs as DDR5 pricing makes high-capacity notebook memory significantly more expensive.
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MSI has introduced a Katana 15 HX C14 option built around DDR4 memory while retaining high-end Intel and Nvidia components. Tom's Hardware reports that a 32GB DDR4 SO-DIMM kit costs about half as much as a comparable DDR5 kit in the current market. The configuration illustrates how elevated DRAM prices can push system vendors toward mature memory standards to preserve retail affordability.
The two memory suppliers may expand collaboration in flash despite remaining direct competitors in the NAND market.
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SK hynix is evaluating closer cooperation with Kioxia in NAND Flash, according to DigiTimes. A deeper relationship could combine investment, development or supply-chain strengths at a time when flash producers face high capital requirements. Any market effect depends on the scope of an eventual agreement, which has not been specified in the supplied report.
The reported concept would place durable flash closer to accelerators, filling a cost and capacity gap between HBM or DRAM and conventional storage pools.
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Micron is reportedly exploring high-endurance NAND modules positioned near GPUs for AI workloads that need more capacity than expensive HBM can provide. The proposed tier would not match DRAM latency or bandwidth, but closer placement could reduce the protocol and distance penalties of accessing conventional storage. If adopted, the architecture could create a new premium NAND use case for large-model inference and training systems.
The Chinese DRAM maker is said to be sampling HBM3E with domestic accelerator developers, with volume production potentially following in 2027.
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CXMT has reportedly begun risk production of HBM3E and is providing samples to Alibaba's T-Head and Cambricon. If customer qualification succeeds, the company could move toward larger-scale output in 2027. The development would represent an important step for China's domestic AI-memory supply, though risk production and sampling do not yet demonstrate commercial yields or meaningful volume.
A three-stage roadmap would progressively add logic to high-bandwidth memory and ultimately place DRAM directly above processor logic for tighter AI integration.
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Samsung outlined a long-range HBM architecture plan at Hot Chips 2026. The concept begins with more capable logic in the HBM base die, advances toward additional in-memory functions and ultimately envisions DRAM stacked directly on processor logic. These designs could reduce data movement and improve AI-system efficiency, but they also increase packaging, thermal and manufacturing complexity before commercial deployment.