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HBM · Oct 3, 2026

SK hynix displays HBM4 and SOCAMM2 alongside NVIDIA's Vera Rubin

The company's TSMC conference showcase paired accelerator memory with CPU memory modules, illustrating the different memory roles within an AI platform.

Price impact: 0Direction: unclearSource: SK hynix Newsroom

SK hynix's newsroom describes a September 23 presentation at TSMC's OIP conference in Santa Clara. Its exhibition included a Vera Rubin superchip with 36GB, 12-layer HBM4 and a 96GB SOCAMM2 module. Nearby displays featured 48GB HBM4E with 12 layers, 48GB HBM4 with 16 layers, 36GB HBM3E with 12 layers and a 192GB SOCAMM2 unit. The company explained the separate roles of GPU-adjacent high-bandwidth memory and low-power DRAM serving the CPU. The showcase provides a view of its AI memory portfolio and collaboration with TSMC; the supplied account does not give commercial shipment volumes or contract prices.

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