XCENA Combines CXL Memory Expansion With Near-Memory Compute

XCENA presented its MX1 memory-centric computing architecture at Hot Chips 2026, according to StorageNewsletter. The company describes a single CXL Type 3 device that combines up to 2TB of DDR5 memory, SSD-backed capacity, and more than 1,000 RISC-V cores. In selected data-analytics kernels, XCENA reported up to 4.7 times the throughput and 18.7 times the energy efficiency of host-CPU processing over CXL. The design aims to reduce data movement between processors and large memory pools, a growing constraint in AI infrastructure. The performance figures are vendor benchmarks on selected workloads, not broad system measurements.