d-Matrix Pairs a Compute Die With Custom DRAM for AI Inference

The Raptor architecture places a logic die face-to-face with purpose-built DRAM. d-Matrix reports 32GB per card and a 100 TB/s vertical interface intended to reduce data-movement energy compared with conventional HBM designs. The memory manufacturer was not identified, the figures remain company projections based on early silicon, and volume pricing was not provided. The company has pointed to a 2027 launch window.