Intel Shows Server DRAM Can Extend LLM Inference Capacity

Intel's reported OCP APAC tests put ordinary server memory back into the AI infrastructure discussion. Instead of treating all inference state as something that must remain inside accelerator memory, the approach uses host DRAM for part of the cache footprint. That can allow more active sessions or larger context handling in cases where memory capacity, rather than compute throughput, is the bottleneck. For RamTrend, the signal is not a new DRAM purchase order. It is evidence that system memory may become a more important design lever for AI servers. HBM and GPU memory remain the premium performance tier, but larger DRAM pools can help stretch deployed accelerators for some inference workloads. The market impact is therefore positive but workload-dependent.