ZEISS capacity push targets an ASML optics bottleneck in the AI chip buildout

ZEISS Semiconductor Manufacturing Technology is adding production capacity in Germany to address a key optics constraint affecting ASML lithography systems, according to the source report. The demand backdrop is the AI chip boom, which is increasing orders for advanced logic and memory manufacturing. This matters for memory because EUV and related lithography capacity influence how quickly suppliers can expand leading-edge DRAM and HBM-supporting process flows. More optics capacity can eventually improve tool availability, but until those constraints ease, equipment bottlenecks can slow the arrival of new wafer capacity. That keeps the near-term memory pricing read constructive while pointing to long-term supply relief if the expansion succeeds.