SEMICON Taiwan agenda puts memory beside AI interconnect constraints

This is an event-preview signal, not a price report. The useful point for RamTrend is that memory is being discussed as part of system-level AI integration alongside compute and optical interconnect. The planned Memory Executive Summit focus on HBM reflects how bandwidth and data movement remain gating factors for AI training and inference. That keeps advanced memory vendors exposed to AI platform design decisions, even when pricing is set elsewhere in the supply chain.