RamTrend

AI Infrastructure · Jul 15, 2026

Intel EMIB attention highlights packaging pressure around AI accelerators

A Tom's Hardware report says Google has reportedly selected Intel's EMIB-T packaging for a future TPU, underscoring interest in alternatives to constrained CoWoS capacity.

Price impact: 1Direction: upSource: Tom's Hardware

This is not a DRAM contract-price story, but it matters to the memory ecosystem because advanced AI accelerators depend on packaging paths that can connect compute silicon with HBM. If more chip designers evaluate EMIB-style options alongside TSMC's CoWoS family, some pressure could shift across the advanced-packaging supply chain. RamTrend should watch this as an infrastructure bottleneck signal: HBM demand may stay strong, while packaging availability can influence how quickly that demand turns into shipped AI systems.

IntelGoogleTSMCHBMEMIBCoWoSAI accelerators
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