Tom's Hardware reported that TSMC is studying panel-level packaging and developing CoPoS, while company executive Kevin Zhang said wafer-level packaging remains the more mature route. The memory-market relevance is indirect but important: the largest AI processors typically depend on advanced packaging to combine compute dies and nearby high-bandwidth memory stacks. If CoWoS-style capacity remains the main production path for the largest packages, packaging availability can continue to shape how quickly AI accelerators and their memory stacks reach customers. The report does not describe a new supply shortage or a specific HBM order, so the price signal should be treated as structural rather than immediate.
AI Infrastructure · Jun 16, 2026
TSMC Signals CoWoS Will Remain Central for Large AI Packages
TSMC's view that wafer-level packaging remains ahead of panel-level alternatives suggests the AI accelerator supply chain will keep leaning on CoWoS-class capacity for the largest packages.
Price impact: 1Direction: upSource: Tom's Hardware
TSMCCoWoSCoPoSadvanced packagingAI accelerators
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