Samsung and Synopsys Deepen Advanced-Node Design Collaboration

Samsung Foundry and Synopsys announced an expanded collaboration around advanced-node enablement at the SAFE Forum 2026. The work covers AI-assisted design flows, test capabilities, interface IP, and support for multi-die implementations. The companies said Synopsys flows are prepared for Samsung's third-generation 2 nm-class process, with optimization work also tied to power, performance, signoff, and production readiness. The feed matcher flagged several memory-interface technologies in the item, including DDR5, DDR6, LPDDR, LPDDR6, RDIMM, MRDIMM, and DIMM categories. For RamTrend, this is an upstream semiconductor infrastructure story rather than a near-term memory-price catalyst. Better EDA and IP support can reduce risk for AI and multi-die chips that depend on high-bandwidth memory subsystems, but the report does not include memory shipment volumes, wafer allocations, contract pricing, or product launch schedules.