Cadence and Samsung Foundry expand memory IP work for 2 nm designs

Electronics Weekly reports that Cadence and Samsung Foundry have worked on memory and interface IP while broadening certification for Cadence design flows on Samsung's second-generation 2 nm process. This is not a commodity DRAM pricing story. It is relevant as an enablement update for future SoCs that need embedded memory, high-speed interfaces, and advanced packaging design flows. RamTrend should track it as technology infrastructure for future chips rather than as a near-term supply or ASP catalyst.